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http://hdl.handle.net/20.500.12386/33489
Title: | NI-DPU ASW Test Specifications | Authors: | MEDINACELI VILLEGAS, Eduardo Bortoletto, Favio BONOLI, Carlotta BALESTRA, Andrea D'ALESSANDRO, Maurizio FARINELLI, Ruben |
Issue Date: | 2020 | Abstract: | This document is focused on the DPU-ASW applicative software test phases between the first delivery of the DPU-WE HW model and the delivery of the ASW final version (Flight) tested with the NISP-WE Flight configuration. All tests - within the limitations of each specific HW, will cover different functional and performance aspects of the ASW features; they will be specified in each case. A consistent part of tests will be based on data-processing procedures (basically final science frame extraction and compression of the same). In this specific case the needed hardware environment can be reduced to the Maxwell CPU board. In an initial phase, tests were carried out with the aid of simulators for some missing HW parts. They are described along the present document. Some End-to-end preliminary tests required the full EM hardware plus MMU simulator, ICU simulator and Quick-Look procedure as described in RD-9. The availability of the EQM model allow to verify the handling of multiple DCUs/SCEs and the synchronization of exposures. During the AIV campaign two DPUs are used contemporary (DPU-EM and DPU-EQM); with this setup the synchronization mechanism of the two DPUs was verified. Using more complete setups during the NI-EM-TV and TV3 test campaigns (described in Section 5) DPU flight modes were used, and the operations using the complete DPU HW setup (using the two DPU-Flight models) and using the entire NISP flight focal plane (multiplicity of 16 DCUs-SCEs) were verified. As well as the performances of the scientific data production, processing and transmission using 16 Flight detectors (16xSCA-CFC-SCE triplets) connected to the 16xDCUs. It is assumed in this document that the HW and SW parts specifically committed and delivered by the industry to cover the needs of all the WE development models have passed a set of electrical, functional and performance tests, as described in the documentation provided with the DPU HW CDR and QR closeouts. It is also assumed that all the HW and Boot SW, basic SW and middleware (HDSW) is completely and correctly operating and those tests will not be repeated. But both basic SW and HW functionalities will be verified and validated only indirectly during the different DPU-ASW testing phases. We also assume that all stress and long duration tests have been passed for all the HW components, and that those are not under DPU-ASW development team responsibility, that is HW parts, Boot SW and Basic SW. | URI: | http://hdl.handle.net/20.500.12386/33489 | Fulltext: | reserved |
Appears in Collections: | 4.03 Rapporti di progetto |
Files in This Item:
File | Description | Size | Format | Existing users please |
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EUCL-OPD-PL-7-003 NI-DPU ASW Test Specifications.pdf | [Administrators only] | 2.4 MB | Adobe PDF |
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