Kamp, WilliamWilliamKampAbel, NorbertNorbertAbelCOMORETTO, GiovanniGiovanniCOMORETTO2021-04-082021-04-082018978-1-7281-1968-7978-1-7281-1969-4http://hdl.handle.net/20.500.12386/30724This paper presents FPGA designs and design optimisations for the complex multiply accumulate cells (CMACs) that are the basic building block of the Square Kilometre Array (SKA) correlators. The CMACs use a novel signal encoding technique to pack a complex multiplication into a single integer multiplication. This halves the number of hard multiplier blocks required to implement the SKA correlators. Designs are presented for use in both the Mid and Low Correlator Beamformers (CBF), which employ Intel Stratix10 and Xilinx UltraScale + FPGAs respectively. Further optimisations enable a reduction in the correlator resources by approximately 40%. These optimisations allow Mid.CBF and Low.CBF to put all required functionality into a minimal number of FPGAs, thereby saving cost and most importantly power.STAMPAenConference paper10.1109/RECONFIG.2018.86417082-s2.0-85063150507000462282700017https://ieeexplore.ieee.org/document/8641708ING-INF/05 - SISTEMI DI ELABORAZIONE DELLE INFORMAZIONI