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  1. OA@INAF
  2. PRODOTTI RICERCA INAF
  3. 4 ALTRI PRODOTTI SCIENTIFICI (Other scientific products)
  4. 4.01 Rapporti tecnici INAF
Please use this identifier to cite or link to this item: http://hdl.handle.net/20.500.12386/31054
Title: Software acceleration on Xilinx FPGAs using OmpSs@FPGA ecosystem
Authors: Goz, David 
BERTOCCO, SARA 
TAFFONI, Giuliano 
CORETTI, Igor 
Issue Date: 2021
Series: INAF Technical Reports - Rapporti Tecnici INAF 
Report: 96
Abstract: The OmpSs@FPGA programming model allows offloading application functionality to Xilinx Field Programmable Gate Arrays (FPGAs). The OmpSs compiler splits the code (written in C/C++ high level language) in two parts, targeting the host and the FPGA. The first is usually compiled by the GNU Compiler Collection (GCC), while the latter is given to the Xilinx Vivado HLS tool (hereafter HLS) for high level synthesis to VHDL and bitstream used to program the FPGA. OmpSs@FPGA is based on compiler directives, which allow the programmer to annotate the part of the code to automatically exploit all Symmetric MultiProcessor system (smp) and FPGA resource available in the execution platform. This technical report provides both descriptive and hands-on introductions to build application-specific FPGA systems using the high-level OmpSs@FPGA tool. The goal is to give the reader a baseline view of the process of creating an optimized hardware design annotating C-based code with HLS directives. We assume the reader has a working knowledge of C/C++, and familiarity with basic computer architecture concepts (e.g. speedup, parallelism, pipelining).
URI: http://hdl.handle.net/20.500.12386/31054
http://dx.doi.org/10.20371/INAF/TechRep/96
Fulltext: open
Appears in Collections:4.01 Rapporti tecnici INAF

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